ChipAgents Helps Andes Technology Dramatically Accelerate Custom Processor Design and Verification

Agentic AI platform reduces months-long verification workflow to approximately three weeks while helping leading CPU IP provider streamline complex silicon development

SANTA CLARA, Calif., September 02, 2026--ChipAgents, the category leader for Agentic AI platforms in the semiconductor design industry, announced that Andes Technology, a leading supplier of RISC-V processor IP and a Founding Premier member of RISC-V International, has successfully deployed ChipAgents across multiple processor design and verification projects. In production deployments, Andes reduced a processor customization task from 8.5 weeks to six weeks, a 30% reduction in development time, while cutting a separate verification workflow from two-to-three months to approximately three weeks.

"The semiconductor industry is entering an era where customization is becoming a competitive advantage, but customization traditionally comes at the cost of engineering time," said William Wang, CEO of ChipAgents. "As companies build more specialized processors for AI, edge computing, and domain-specific applications, engineering teams are being asked to deliver more innovation without extending development schedules. ChipAgents is fundamentally changing that equation by helping engineers move faster through some of the most time-intensive parts of the design and verification process."

One challenge ChipAgents helped Andes overcome was customizing a complex Memory Load-Store Unit (LSU), a critical processor subsystem responsible for managing memory operations. Traditionally, modifying these components requires engineers to spend weeks tracing legacy RTL, analyzing architectural dependencies and validating correctness before new functionality can be introduced. Using ChipAgents, Andes reduced the project timeline from 8.5 weeks to six weeks while maintaining architectural correctness.

ChipAgents also helped Andes address one of the most persistent bottlenecks in semiconductor development: verification. Bus Interface Unit (BIU) verification traditionally requires extensive manual effort to synchronize specifications, update verification environments, and create tests for complex concurrency scenarios. By leveraging ChipAgents, Andes reduced a workflow that traditionally required two-to-three months to approximately three weeks. Complex verification stimulus generation tasks that previously required one to two weeks of engineering effort were reduced to as little as one to two days.

"As processor architectures continue to evolve, both customization and verification are becoming increasingly resource-intensive," said Yung-Ching Hsiao, Senior VP of R&D at Andes Technology. "ChipAgents helps our teams reduce manual effort across multiple engineering workflows, allowing us to accelerate development schedules while maintaining the quality and correctness required for production processor designs."